80C51 Family

Indirect Addressing
In indirect addressing the instruction specifies a register which
contains the address of the operand. Both internal and external
RAM can be indirectly addressed.
The address register for 8-bit addresses can be R0 or R1 of the
selected bank, or the Stack Pointer. The address register for 16-bit
addresses can only be the 16-bit “data pointer” register, DPTR.
Register Instructions
The register banks, containing registers R0 through R7, can be
accessed by certain instructions which carry a 3-bit register
specification within the opcode of the instruction. Instructions that
access the registers this way are code efficient, since this mode
eliminates an address byte. When the instruction is executed, one of
the eight registers in the selected bank is accessed. One of four
banks is selected at execution time by the two bank select bits in the
PSW.
Register-Specific Instructions
Some instructions are specific to a certain register. For example,
some instructions always operate on the Accumulator, or Data
Pointer, etc., so no address byte is needed to point to it. The opcode
itself does that. Instructions that refer to the Accumulator as A
assemble as accumulator specific opcodes.
Immediate Constants
The value of a constant can follow the opcode in Program Memory.
For example,
MOV A, #100
loads the Accumulator with the decimal number 100. The same
number could be specified in hex digits as 64H.
Indexed Addressing
Only program Memory can be accessed with indexed addressing,
and it can only be read. This addressing mode is intended for
reading look-up tables in Program Memory A 16-bit base register
(either DPTR or the Program Counter) points to the base of the
table, and the Accumulator is set up with the table entry number.
The address of the table entry in Program Memory is formed by
adding the Accumulator data to the base pointer.
Another type of indexed addressing is used in the “case jump”
instruction. In this case the destination address of a jump instruction
is computed as the sum of the base pointer and the Accumulator
data.
Arithmetic Instructions
The menu of arithmetic instructions is listed in Table 1. The table
indicates the addressing modes that can be used with each
instruction to access the operand. For example, the ADD
A, instruction can be written as:
ADD a, 7FH (direct addressing)
ADD A, @R0 (indirect addressing)
ADD a, R7 (register addressing)
ADD A, #127 (immediate constant)
The execution times listed in Table 1 assume a 12MHz clock
frequency. All of the arithmetic instructions execute in 1ms except
the INC DPTR instruction, which takes 2ms, and the Multiply and
Divide instructions, which take 4ms.
Note that any byte in the internal Data Memory space can be
incremented without going through the Accumulator.
One of the INC instructions operates on the 16-bit Data Pointer. The
Data Pointer is used to generate 16-bit addresses for external
memory, so being able to increment it in one 16-bit operation is a
useful feature.
The MUL AB instruction multiplies the Accumulator by the data in
the B register and puts the 16-bit product into the concatenated B
and Accumulator registers.
The DIV AB instruction divides the Accumulator by the data in the B
register and leaves the 8-bit quotient in the Accumulator, and the
8-bit remainder in the B register.
Oddly enough, DIV AB finds less use in arithmetic “divide” routines
than in radix conversions and programmable shift operations. An
example of the use of DIV AB in a radix conversion will be given
later. In shift operations, dividing a number by 2n shifts its n bits to
the right. Using DIV AB to perform the division completes the shift in
4ms and leaves the B register holding the bits that were shifted out.
The DA A instruction is for BCD arithmetic operations. In BCD
arithmetic, ADD and ADDC instructions should always be followed
by a DA A operation, to ensure that the result is also in BCD. Note
that DA A will not convert a binary number to BCD. The DA A
operation produces a meaningful result only as the second step in
the addition of two BCD bytes